View TDA4687_233953.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

INTEGRATED CIRCUITS
DATA SHEET
TDA4687 Video processor with automatic cut-off control
Product specification Supersedes data of May 1993 File under Integrated Circuits, IC02 1997 Jun 23
Philips Semiconductors
Product specification
Video processor with automatic cut-off control
FEATURES * Operates from an 8 V DC supply * Black level clamping of the colour difference, luminance and RGB input signals with coupling-capacitor DC level storage * Two analog RGB inputs, selected either by fast switch signals or via I2C-bus; brightness and contrast control of both RGB inputs * Saturation, contrast, brightness and white adjustment via I2C-bus * Same RGB output black levels for Y/CD and RGB input signals * Timing pulse generation from either a 2 or 3-level sandcastle pulse for clamping, vertical synchronization and cut-off timing pulses * Automatic cut-off control or clamped output selectable via I2C-bus * Automatic cut-off control with picture tube leakage current compensation * Cut-off measurement pulses after end of the vertical blanking pulse or end of an extra vertical flyback pulse * Ultra-black or nominal black blanking selectable via I2C-bus in clamped output mode * Two switch-on delays to prevent discolouration before steady-state operation * Average beam current and peak drive limiting * PAL/SECAM or NTSC matrix selection via I2C-bus * Emitter-follower RGB output stages to drive the video output stages * I2C-bus controlled DC output e.g. for hue-adjust of NTSC (multistandard) decoders
TDA4687
line TDA4661 and the Picture Signal Improvement (PSI) IC, TDA467X, or from a feature module. The required input signals are: * Luminance and negative colour difference signals * 2 or 3-level sandcastle pulse for internal timing pulse generation * I2C-bus data and clock signals for microcontroller control. Two sets of analog RGB colour signals can also be inserted, e.g. one from a peritelevision connector and the other from an on-screen display generator. The TDA4687 includes full I2C-bus control of all parameters and functions with automatic cut-off control of the picture tube cathode currents. It provides RGB output signals for the video output stages. The TDA4687 is a simplified, pin compatible (except for pin 18) version of the TDA4680. The module address via I2C-bus can be used for both ICs; where a function is not included in the TDA4687 the I2C-bus command is not executed. The differences with the TDA4680 are: * No automatic white level control; the white levels are determined directly by the I2C-bus data * RGB reference levels for automatic cut-off control are not adjustable via I2C-bus * Clamping delay is fixed * Only contrast and brightness adjust for the RGB input signals * The measurement lines are triggered either by the trailing edge of the vertical component of the sandcastle pulse or by the trailing edge of an optional external vertical flyback pulse (on pin 18), according to which occurs first. The TDA4686 is like TDA4687 but intended for double line frequency application.
* Positive amplification factor of cut-off control voltage. GENERAL DESCRIPTION The TDA4687 is a monolithic integrated circuit with a luminance and a colour difference interface for video processing in TV receivers. Its primary function is to process the luminance and colour difference signals from a colour decoder which is equipped e.g. with the multistandard decoder TDA4655 or TDA9160 plus delay ORDERING INFORMATION
PACKAGE TYPE NUMBER NAME TDA4687 1997 Jun 23 DIP28 DESCRIPTION plastic dual in-line package; 28 leads (600 mil) 2 VERSION SOT117-1
Philips Semiconductors
Product specification
Video processor with automatic cut-off control
QUICK REFERENCE DATA SYMBOL VP IP V8(p-p) V6(p-p) V7(p-p) V14 supply voltage (pin 5) supply current (pin 5) luminance input (peak-to-peak value) -(B - Y) input (peak-to-peak value) -(R - Y) input (peak-to-peak value) 3-level sandcastle pulse H+V H BK 2-level sandcastle pulse H+V BK Vi(p-p) Vo(b-w) Tamb RGB input signals at pins 2, 3, 4, 10, 11 and 12 (peak-to-peak value) RGB outputs at pins 24, 22 and 20 (black-to-white value) operating ambient temperature - - - - 0 2.5 4.5 0.7 2.0 - - - - - 70 - - - 2.5 4.5 8.0 - - - PARAMETER - - - - MIN. 7.2 TYP. 8.0 60 0.45 1.33 1.05 - - - -
TDA4687
MAX. 8.8 V
UNIT mA V V V V V V V V V V C
1997 Jun 23
3
Product specification
TDA4687
Fig.1 Block diagram.
handbook, full pagewidth
1997 Jun 23
hue control voltage 26
A45 to A40, A55 to A50, A65 to A60 AA5 to AA0 A05 to A00, A15 to A10, A25 to A20, A35 to A30
BLOCK DIAGRAM
Philips Semiconductors
SDA
27 6-BIT D/A CONVERTER 19 cut-off control
RC
I2C-bus
I2C-BUS
leakage and cut-off current input
SCL
28
RECEIVER
BREN
TDA4687
1ST AND 2ND SWITCH-ON DELAYS CUT-OFF COMPARATORS
VFB 17
18 leakage storage
sandcastle pulse SANDCASTLE BK PULSE H+V DETECTOR (H) TIMING GENERATOR 16
BCOF FSDIS2, FSON2, FSDIS1, FSON1
14
SC5
peak drive limiting storage 15 average beam current
2 x 8-BIT CONTROL REGISTERS timing pulses
PEAK DRIVE AND AVERAGE BEAM CURRENT LIMITING
FSW1
NMEN
13
Video processor with automatic cut-off control
4
4 x 6-BIT D/A CONVERTERS 3 x 6-BIT D/A CONVERTERS R R CONTRAST ADJUST B G G B R R WHITE POINT ADJUST G B FAST SIGNAL G SOURCE SWITCH, BLANKING 1 B R BRIGHTNESS ADJUST, G BLANKING 2, MEASUREMENT B PULSES SUPPLY 5 9 VP = 8 V
R1
10
G1
11
B1
12
BCOF
Y
8
24 22 20
RO GO BO RGB outputs
-(R - Y)
7
-(B - Y)
6
SATURATION ADJUST
PAL/SECAM, NTSC MATRIX
CUT-OFF ADJUST, OUTPUT STAGES
FSW2
1
R2
2
G2
3
B2
4
21 B
23 G
25 R
MED720
I2C-bus data and control signals
cut-off storage
Philips Semiconductors
Product specification
Video processor with automatic cut-off control
PINNING SYMBOL PIN FSW2 R2 G2 B2 VP -(B - Y) -(R - Y) Y GND R1 G1 B1 FSW1 SC BCL CPDL CL VFB CI BO CB GO CG RO CR HUE SDA SCL 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 red input 2 green input 2 blue input 2 supply voltage colour difference input -(B - Y) colour difference input -(R - Y) luminance input ground red input 1 green input 1 blue input 1 fast switch 1 input sandcastle pulse input average beam current limiting input storage capacitor for peak drive limiting storage capacitor for leakage current vertical flyback pulse input cut-off measurement input blue output blue cut-off storage capacitor green output green cut-off storage capacitor red output red cut-off storage capacitor hue control output I2C-bus serial data input; acknowledge output I2C-bus serial clock input Fig.2 Pin configuration.
handbook, halfpage
TDA4687
DESCRIPTION fast switch 2 input
FSW2 1 R2 2 G2 3 B2 4 VP 5 -(B - Y) 6 -(R - Y) 7
28 SCL 27 SDA 26 HUE 25 CR 24 RO 23 CG
TDA4687
Y8 GND 9 R1 10 G1 11 B1 12 FSW1 13 SC 14
MED721
22 GO 21 CB 20 BO 19 CI 18 VFB 17 CL 16 CPDL 15 BCL
1997 Jun 23
5
Philips Semiconductors
Product specification
Video processor with automatic cut-off control
I2C-BUS PROTOCOL Control The I2C-bus transmitter provides the data bytes to select and adjust the following functions and parameters: * Brightness adjust * Saturation adjust * Contrast adjust * DC output e.g. for hue control * RGB gain adjust * Peak drive limiting level adjust * Selects either 3-level or 2-level (5 V) sandcastle pulse * Enables cut-off control; enables output clamping (2 different modes) * Selects either PAL/SECAM or NTSC matrix * Enables/disables synchronization of the execution of I2C-bus commands with the vertical blanking interval * Enables Y/CD, RGB1 or RGB2 input. I2C-bus transmitter and data transfer I2C-BUS SPECIFICATION The I2C-bus is a bidirectional, two-wire, serial data bus for intercommunication between ICs in an equipment. The microcontroller transmits data to the I2C-bus receiver in the TDA4687 over the serial data line SDA (pin 27) synchronized by the serial clock line SCL (pin 28). Both lines are normally connected to a positive voltage supply through pull-up resistors. Data is transferred when the SCL line is LOW. When SCL is HIGH the serial data line SDA must be stable. A HIGH-to-LOW transition of the SDA line when SCL is HIGH is defined as a START bit. A LOW-to-HIGH transition of the SDA line when SCL is HIGH is defined as a STOP bit. Each transmission must start with a START bit and end with a STOP bit. The bus is busy after a START bit and is only free again after a STOP bit has been transmitted.
TDA4687
I2C-BUS RECEIVER (MICROCONTROLLER WRITE MODE) Each transmission to the I2C-bus receiver consists of at least three bytes following the START bit. Each byte is acknowledged by an acknowledge bit immediately following each byte. The first byte is the Module Address (MAD) byte, also called slave address byte. This includes the module address, 1000100 for the TDA4687. The TDA4687 is a slave receiver (R/W = 0), therefore the module address byte is 10001000 (88H; see also Fig.3). The length of a data transmission is unrestricted, but the module address and the correct subaddress must be transmitted before the data byte(s). The order of data transmission is shown in Figs 4 and 5. Without auto-increment (BREN = 0 or 1) the module address (MAD) byte is followed by a SubAddress (SAD) byte and one data byte only (see Fig.4).
1997 Jun 23
6
Philips Semiconductors
Product specification
Video processor with automatic cut-off control
TDA4687
handbook, full pagewidth
MSB 1 0 0 0 1 0
LSB 0 0 R/W
MED710
ACK
module address
Fig.3 The module address byte.
handbook, full pagewidth
STA
MAD SAD
STO
MED697
START condition
data byte
STOP condition
Fig.4 Data transmission without auto-increment (BREN = 0 or 1).
handbook, full pagewidth
STA START condition
MAD SAD
STO
MED698
data byte data bytes
STOP condition
Fig.5 Data transmission with auto-increment (BREN = 0).
1997 Jun 23
7
Philips Semiconductors
Product specification
Video processor with automatic cut-off control
AUTO-INCREMENT The auto-increment format enables quick slave receiver initialization by one transmission, when the I2C-bus control bit BREN = 0 (see control register bits of Table 1). If BREN = 1 auto-increment is not possible. If the auto-increment format is selected, the MAD byte is followed by a SAD byte and by the data bytes of consecutive subaddresses (see Fig.5). All subaddresses from 00H to 0FH are automatically incremented, the subaddress counter wraps round from 0FH to 00H. Reserved subaddresses 07H, 08H, 09H, 0BH and 0FH are treated as legal but have no effect. Subaddresses outside the range 00H and 0FH are not acknowledged by the device. Subaddresses are stored in the TDA4687 to address the following parameters and functions (see Table 1): * Brightness adjust * Saturation adjust * Contrast adjust * Hue control voltage * RGB gain adjust * Peak drive limiting adjust * Control register functions. The data bytes D7 to D0 (see Table 1) provide the data of the parameters and functions for video processing. CONTROL REGISTER 1 NMEN (NTSC Matrix Enable): 0 = PAL/SECAM matrix 1 = NTSC matrix. BREN (Buffer Register Enable): 0 = new data is executed as soon as it is received 1 = data is stored in buffer registers and is transferred to the data registers during the next vertical blanking interval. The I2C-bus receiver does not accept any new data until this data is transferred into the data registers. SC5 (SandCastle 5 V): 0 = 3-level sandcastle pulse 1 = 2-level (5 V) sandcastle pulse. CONTROL REGISTER 3 MOD2 (output clamp MODe2) 0 = inactive CONTROL REGISTER 2 FSON2 (Fast Switch 2 ON). FSDIS2 (Fast Switch 2 Disable). FSON1 (Fast Switch 1 ON). FSDIS1 (Fast Switch 1 Disable).
TDA4687
The RGB input signals are selected by FSON2 and FSON1 or FSW2 and FSW1: * FSON2 has priority over FSON1 * FSW2 has priority over FSW1 * FSDIS1 and FSDIS2 disable FSW1 and FSW2 (see Table 2). BCOF (Black level Control Off): 0 = automatic cut-off control enabled 1 = automatic cut-off control disabled; RGB outputs are clamped to fixed DC levels.
1 = output clamping, but brightness inactive. When MOD2 = 1 and BCOF = 1 output clamp is enabled and brightness adjust is disabled (for clamping purposes of following RGB receivers). (BCOF = 0) AND (MOD2 = 1); from the description given above the influence on the clamping stage is contradictory. Consequently, there is no purpose to this combination and it makes no sense to switch this combination. When the supply voltage has dropped below approximately 6.0 V (usually occurs when the TV receiver is switched on or the supply voltage is interrupted) all data and function bits are set to 01H.
1997 Jun 23
8
Philips Semiconductors
Product specification
Video processor with automatic cut-off control
Table 1 Subaddress (SAD) and data bytes; note 1 SAD (HEX) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F MSB D7 0 0 0 0 0 0 0 0 0 0 0 X SC5 X X X D6 0 0 0 0 0 0 0 0 0 0 0 X X X X X D5 A05 A15 A25 A35 A45 A55 A65 X X X AA5 X BREN X MOD2 X D4 A04 A14 A24 A34 A44 A54 A64 X X X AA4 X X BCOF X X D3 A03 A13 A23 A33 A43 A53 A63 X X X AA3 X NMEN FSDIS2 X X D2 A02 A12 A22 A32 A42 A52 A62 X X X AA2 X X FSON2 X X
TDA4687
LSB D1 A01 A11 A21 A31 A41 A51 A61 X X X AA1 X X FSDIS1 X X D0 A00 A10 A20 A30 A40 A50 A60 X X X AA0 X X FSON1 X X
FUNCTION Brightness Saturation Contrast Hue control voltage Red gain Green gain Blue gain Reserved Reserved Reserved Peak drive limit Reserved Control register 1 Control register 2 Control register 3 Reserved Note
1. X = don't care, but for software compatibility with other or future video ICs it is recommended to set all X to logic 0.
1997 Jun 23
9
Philips Semiconductors
Product specification
Video processor with automatic cut-off control
Table 2 Signal input selection by the fast source switches; notes 1 to 4 ANALOG SWITCH SIGNALS FSW2 (PIN 1) L L H L L L L L H Notes 1. H: logic HIGH implies that the voltage >0.9 V. 2. L: logic LOW implies that the voltage <0.4 V. 3. X = don't care. 4. ON indicates the selected input signal. LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VP Vi supply voltage (pin 5) input voltage (pins 1 to 8, 10 to 13, 16, 21, 23 and 25) input voltage (pins 15, 18 and 19) input voltage (pins 27 and 28) V14 Iav IM I26 Tstg Tamb Ptot sandcastle pulse voltage average current (pins 20, 22 and 24) peak current (pins 20, 22 and 24) output current storage temperature operating ambient temperature total power dissipation PARAMETER - -0.1 -0.7 -0.1 -0.7 -10 -20 -8 -20 0 - MIN. L L H H H X L H L L H X H X L H X X L H L H X X X X X FSW1 (PIN 13) L H X X X X X L H X X X ON ON ON ON ON ON ON ON RGB2
TDA4687
I2C-BUS CONTROL BITS FSON2 FSDIS2 FSON1 FSDIS1 L L L L
INPUT SELECTED RGB1 Y/CD ON
ON
ON ON
MAX. 8.8 +VP VP + 0.7 +8.8 VP + 5.8 +4 +4 +0.6 +150 70 1.2 V V V V V
UNIT
mA mA mA C C W
1997 Jun 23
10
Philips Semiconductors
Product specification
Video processor with automatic cut-off control
TDA4687
CHARACTERISTICS All voltages are measured in test circuit of Fig.9 with respect to GND (pin 9); VP = 8.0 V; Tamb = 25 C; nominal signal amplitudes (black-to-white) at output pins 24, 22 and 20; nominal settings of brightness, contrast, saturation and white level control; without beam current or peak drive limiting; unless otherwise specified. SYMBOL Supply (pin 5) VP IP V6(p-p) V7(p-p) V6,7 I6,7 R6,7 Vi(p-p) V8(bias) I8 R8 supply voltage supply current -(B - Y) input (peak-to-peak value) -(R - Y) input (peak-to-peak value) internal DC bias voltage input current input resistance 7.2 - - - - - 100 10 - - - 100 10 - - - 100 10 - - - 100 10 8.0 60 8.8 - - - - 0.1 - - - - 0.1 - - - - 0.1 - - - - 0.1 - - V mA PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Colour difference inputs [-(B - Y): pin 6; -(R - Y): pin 7] notes 1 and 2 notes 1 and 2 at black level clamping during line scan at black level clamping Luminance/sync (VBS; Y: pin 8) luminance input voltage at pin 8 (peak-to-peak value) internal DC bias voltage input current input resistance note 2 at black level clamping during line scan at black level clamping RGB input 1 (R1: pin 10; G1: pin 11; B1: pin 12) Vi(p-p) input voltage at pins 10, 11 and 12 (peak-to-peak value) input current input resistance note 2 at black level clamping during line scan at black level clamping R10/11/12 RGB input 2 (R2: pin 2, G2: pin 3, B2: pin 4) Vi(p-p) V2/3/4 I2/3/4 R2/3/4 input voltage at pins 2, 3 and 4 (peak-to-peak value) internal DC bias voltage input current input resistance note 2 at black level clamping during line scan at black level clamping 0.7 5.7 - - - V V A A M 0.7 5.7 - - - V V A A M 0.45 4.1 - - - V V A A M 1.33 1.05 4.1 - - - V V V A A M
V10/11/12(bias) internal DC bias voltage I10/11/12
1997 Jun 23
11
Philips Semiconductors
Product specification
Video processor with automatic cut-off control
TDA4687
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Fast signal switch FSW1 (pin 13) to select Y, CD or R1, G1, B1 inputs (control bits: see Table 2) V13 R13 t voltage to select Y and CD voltage to select R1, G1, B1 internal resistance to ground difference between transit times for signal switching and signal insertion - 0.9 - - - - 4.0 - 0.4 5.0 - 10 V V k ns
Fast signal switch FSW2 (pin 1) to select Y, CD/R1, G1, B1 or R2, G2, B2 inputs (control bits: see Table 2) V1 R1 t voltage to select Y, CD/R1, G1, B1 voltage to select R2, G2, B2 internal resistance to ground difference between transit times for signal switching and signal insertion - 0.9 - - - - 4.0 - 0.4 5.0 - 10 V V k ns
Saturation adjust [acts on -(R - Y) and -(B - Y) signals under I2C-bus control; subaddress 01H (bit resolution 1.5% of maximum saturation); data byte 3FH for maximum saturation, data byte 23H for nominal saturation and data byte 00H for minimum saturation] ds saturation below maximum at 23H at 00H; f = 100 kHz - - 5 50 - - dB dB
Contrast adjust [acts on internal RGB signals under I2C-bus control; subaddress 02H (bit resolution 1.5% of maximum contrast); data byte 3FH for maximum contrast, data byte 22H for nominal contrast and data byte 00H for minimum contrast] dc contrast below maximum at 22H at 00H - - 5 22 - - dB dB
Brightness adjust [acts on internal RGB signals under I2C-bus control; subaddress 00H (bit resolution 1.5% of maximum brightness); data byte 3FH for maximum brightness, data byte 26H for nominal brightness and data byte 00H for minimum brightness] dbr black level shift of nominal signal amplitude referred to cut-off measurement level at 3FH at 00H - - 30 -50 - - % %
White potentiometers [under I2C-bus control; subaddresses 04H (red), 05H (green) and 06H (blue); data byte 3FH for maximum gain; data byte 19H for nominal gain and data byte 00H for minimum gain]; note 3 Gv relative to nominal gain increase of gain decrease of gain at 3FH at 00H - - 50 50 - - % %
1997 Jun 23
12
Philips Semiconductors
Product specification
Video processor with automatic cut-off control
TDA4687
SYMBOL
PARAMETER
CONDITIONS -
MIN.
TYP. - -
MAX.
UNIT
RGB outputs (pins 24, 22 and 20; positive going output signals; peak drive limiter set = 3FH); note 4 Vo(b-w) nominal output signals (black-to-white value) maximum output signals (black-to-white value) Vo Vo V24,22,20 spread between RGB output signals minimum output voltages maximum output voltages voltage of cut-off measurement line equivalent to voltage during ultra-black internal current sources output resistance output clamping; BCOF = 1 2.0 - - - - 2.5 V V % V V V
3.0 - - 6.8 2.3
10 0.8 - 2.7
Iint Ro fres
- - - - -
5.0 20 - - -
- -
mA
Frequency response frequency response of Y path (from pin 8 to pins 24, 22 and 20) frequency response of CD path (from pins 7 to 24 and 6 to 20) frequency response of RGB1 path (from pins 10 to 24, 11 to 22 and 12 to 20) frequency response of RGB2 path (from pins 2 to 24, 3 to 22 and 4 to 20) Sandcastle pulse detector (pin 14) CONTROL BIT SC5 = 0; 3-LEVEL; notes 5 and 6 V14 sandcastle pulse voltage for horizontal and vertical blanking pulses for horizontal pulses (line count) for burst key pulses (clamping) CONTROL BIT SC5 = 1; 2-LEVEL; notes 5 and 6 V14 sandcastle pulse voltage for horizontal and vertical blanking pulses for burst key pulses GENERAL I14 td output current leading edge delay of the clamping pulse V14 = 0 V - - - 1.5 -100 - A s 2.0 4.0 2.5 4.5 3.0 V 2.0 4.0 7.6 2.5 4.5 - 3.0 5.0 V V f = 10 MHz f = 8 MHz f = 10 MHz 3 3 3 dB dB dB
f = 10 MHz
-
-
3
dB
VP + 5.8 V
VP + 5.8 V
1997 Jun 23
13
Philips Semiconductors
Product specification
Video processor with automatic cut-off control
TDA4687
SYMBOL
PARAMETER
CONDITIONS -
MIN. - -
TYP.
MAX.
UNIT
Vertical flyback (pin 18); note 6 V18 vertical flyback pulse internal voltage I18 Vc(15) Vc(15) Vbr(15) Vbr(15) input current for LOW for HIGH pin 18 open-circuit; note 7 2.5 - - 5 - - - - V V V A 4.5 - - - - - -
5.0 -
Average beam current limiting (pin 15); note 8 contrast reduction starting voltage voltage difference for full contrast reduction brightness reduction starting voltage voltage difference for full brightness reduction 4.0 -2.0 2.5 -1.6 V V V V
Peak drive limiting voltage [pin 16; internal peak drive limiting level (Vpdl) acts on RGB outputs under I2C-bus control; subaddress 0AH]; note 9 V20,22,24 I16 V16 Vc(16) Vc(16) Vbr(16) Vbr(16) minimum RGB output voltages maximum RGB output voltages charge current discharge current internal voltage limitation contrast reduction starting voltage voltage difference for full contrast reduction brightness reduction starting voltage voltage difference for full brightness reduction during peak white at 00H at 3FH - 7.0 - - 4.5 - - - - - - -1 5 - 4.0 -2.0 2.5 -1.6 3.0 - - - - - - - - V V A mA V V V V V
Automatic cut-off control (pin 19); notes 6 and 10 to 12; see Fig.7 V19 I19 external voltage output current input current additional input current V24,22,20 V19(th) Vref V19 monitor pulse amplitude (under I2C-bus control; subaddress 0AH) voltage threshold for picture tube cathode warming up internally controlled voltage difference between VMEAS (cut-off measurement voltage) and Vref switch-on delay 1 switch-on delay 1; note 11 switch-on delay 1 during leakage measurement period - - 150 - - - - - - - - 0.5 VP - 1.4 V -60 - - A A mA V V V V
Vpdl - 1.0 - 4.5 2.7 1.0 - - -
1997 Jun 23
14
Philips Semiconductors
Product specification
Video processor with automatic cut-off control
TDA4687
SYMBOL I21,23,25
PARAMETER
CONDITIONS - -
MIN.
TYP. -
MAX.
UNIT
Cut-off storage (pins 25, 23 and 21) charge and discharge currents input currents of storage inputs Storage of leakage information (pin 17) I17 charge and discharge currents leakage current V17 threshold voltage for reset to switch-on state during leakage measurement period outside measurement time - - - 0.4 - 2.5 - 0.1 - mA A V during cut-off measurement lines outside measurement time 0.3 - mA A
0.1
Hue control (under I2C-bus control; subaddress 03H; data byte 3FH for maximum voltage; data byte 20H for nominal voltage and data byte 00H for minimum voltage); note 13 V26 output voltage at 3FH at 20H at 00H Iint current of the internal current source at pin 26 4.8 - - 500 - 3.0 - - - - 1.2 - V V V A
I2C-bus receiver clock SCL (pin 28) fSCL VIL VIH IIL IIH tL tH tr tf I2C-bus VIL VIH IIL IIH IOL tr tf tSU;DAT input frequency range LOW-level input voltage HIGH-level input voltage LOW-level input current HIGH-level input current clock pulse LOW clock pulse HIGH rise time fall time receiver data input/output SDA (pin 27) LOW-level input voltage HIGH-level input voltage LOW-level input current HIGH-level input current LOW-level output current rise time fall time data set-up time - 3.0 - - 3.0 - - 0.25 - - - - - - - - 1.5 6.0 -10 10 - 1.0 0.3 - V V A A mA s s s 0 - 3.0 - - 4.7 4.0 - - - - - - - - - - - 100 1.5 6.0 -10 10 - - 1.0 0.3 kHz V V A A s s s s
1997 Jun 23
15
Philips Semiconductors
Product specification
Video processor with automatic cut-off control
Notes to the characteristics
TDA4687
1. The values of the -(B - Y) and -(R - Y) colour difference input signals are for a 75% colour-bar signal. 2. The pins are capacitively coupled to a low ohmic source, with a recommended maximum output impedance of 600 . 3. The white potentiometers affect the amplitudes of the RGB output signals. 4. The RGB outputs at pins 24, 22 and 20 are emitter followers with current sources. 5. Sandcastle pulses are compared with internal threshold voltages independent of VP. The threshold voltages separate the components of the sandcastle pulse. The particular component is generated when the voltage on pin 14 exceeds the defined internal threshold voltage. The internal threshold voltages (control bit SC5 = 0) are: 1.5 V for horizontal and vertical blanking pulses 3.5 V for horizontal pulses 6.5 V for the burst key pulse. The internal threshold voltages (control bit SC5 = 1) are: 1.5 V for horizontal and vertical blanking pulses 3.5 V for the burst key pulse. 6. Vertical signal blanking is determined by the vertical component of the sandcastle pulse. The leakage and the RGB cut-off measurement lines are positioned in the first four complete lines after the end of the vertical component. In this case, the RGB output signals are blanked until the end of the last measurement line; see Fig.7a. If an extra vertical flyback pulse VFB is applied to pin 18, the four measurement lines start in the first complete line after the end of the VFB pulse; see Fig.7b. In this case, the output signals are blanked either until the end of the last measurement line or until the end of the vertical component of the sandcastle pulse, according to which occurs last. 7. If no VFB pulse is applied, pin 18 can be left open-circuit or connected to VP. If pin 18 is always LOW neither automatic cut-off control nor output clamping can happen. 8. Average beam current limiting reduces the contrast, at minimum contrast it reduces the brightness. 9. Peak drive limiting reduces the RGB outputs by reducing the contrast, at minimum contrast it reduces the brightness. The maximum RGB outputs are determined via the I2C-bus under subaddress 0AH. When an RGB output exceeds the maximum voltage, peak drive limiting is delayed by one horizontal line. 10. During leakage current measurement, the RGB channels are blanked to ultra-black level. During cut-off measurement one channel is set to the measurement pulse level, the other channels are blanked to ultra-black. Since the brightness adjust shifts the colour signal relative to the black level, the brightness adjust is disabled during the vertical blanking interval (see Figs 6 and 7). 11. During picture cathode warming up (first switch-on delay) the RGB outputs (pins 24, 22 and 20) are blanked to the ultra-black level during line scan. During the vertical blanking interval a white-level monitor pulse is fed out on the RGB outputs and the cathode currents are measured. When the voltage threshold on pin 19 is greater than 4.5 V, the monitor pulse is switched off and cut-off control is activated (second switch-on delay). As soon as cut-off control stabilizes, RGB output blanking is removed. 12. Range of cut-off measurement level at the RGB outputs is 1 to 5 V. The recommended value is 3 V. 13. The hue control output at pin 26 is an emitter follower with current source.
1997 Jun 23
16
Philips Semiconductors
Product specification
Video processor with automatic cut-off control
Table 3 Demodulator axes and amplification factors PARAMETER (B - Y)* demodulator axis (R - Y)* demodulator axis (R - Y)* amplification factor (B - Y)* amplification factor Table 4 PAL/SECAM and NTSC matrix; note 1 MATRIX PAL/SECAM NTSC Note NMEN 0 1 NTSC 0 115 1.97 2.03
TDA4687
PAL 0 90 1.14 2.03
1. PAL/SECAM signals are matrixed by the equation: VG - Y = -0.51VR - Y - 0.19VB - Y NTSC signals are matrixed by the equations (hue phase shift of -5 degrees): VR - Y* = 1.57VR - Y - 0.41VB - Y; VG - Y* = -0.43VR - Y - 0.11VB - Y; VB - Y* = VB - Y In the matrix equations: VR - Y and VB - Y are conventional PAL demodulation axes and amplitudes at the output of the NTSC demodulator. VG - Y*, VR - Y* and VB - Y* are the NTSC modified colour difference signals; this is equivalent to the demodulator axes and amplification factors shown in Table 3. VG - Y* = -0.27VR - Y* - 0.22VB - Y*.
handbook, full pagewidth
(1)
MHA697
(2)
cut-off measurement line for red signal
ultra-black
(1) Maximum brightness.
(2) Nominal brightness.
Fig.6 Cut-off measurement pulse.
1997 Jun 23
17
Philips Semiconductors
Product specification
Video processor with automatic cut-off control
TDA4687
handbook, full pagewidth
sandcastle pulse with vertical component
R channel LM MR
G channel LM MG
B channel LM MB
MHA698
a. Timing controlled by sandcastle pulse.
vertical flyback handbook, full pagewidth pulse (VFB)
R channel LM MR
G channel LM MG
B channel LM MB
MHA699
b. Timing controlled by additional vertical flyback pulse (VFB).
LM = leakage current measurement time. MR, MG, MB = R, G, B cut-off measurement pulses.
Fig.7 Leakage and cut-off current measurement timing diagrams.
1997 Jun 23
18
handbook, full pagewidth
1997 Jun 23
25 24
Philips Semiconductors
INTERNAL PIN CONFIGURATION
28
27
26
+
23 22 21 20 19 18 17 16 15
+
+
TDA4687
Video processor with automatic cut-off control
19
CL CL CL CL CL CL
CL
CL
CL
+ +
1
2
3
4
5
6
7
8
9
10
11
12
13
14
MED722
+
diode protection on all pins except pins 5, 14, 27 and 28
Product specification
TDA4687
Fig.8 Internal circuits.
1997 Jun 23
SCL SDA FSW2 1 28 27 26 25 24 23 22 GO 6 Ro Go Bo CI 220 nF 7 8 9 10 330 nF 1 F 82 k CON2 BZX79 C6V2 VFB (optional) CB BO CI VFB CL CPDL BCL CG 5 220 nF RO 4 GND CR 3 220 nF HUE 2 +12 V SDA 100 1 200 V 2 3 4 5 6 7 10 nF 10 nF 10 nF 75 75 10 nF 10 nF 10 nF 47 nF Y 8 9 10 11 12 13 14 15 16 17 18 19 20 21 GND 10 nF 10 nF 10 nF FSW1 SC 75 1N4148 75 B1 G1 R1 -(R - Y) -(B - Y) VP B2 G2 R2 SCL 100 hue
handbook, full pagewidth
Philips Semiconductors
FSW2
R2
G2
B2
75
75
TEST AND APPLICATION INFORMATION
-(B - Y)
-(R - Y)
TDA4687
Y
R1
G1
Video processor with automatic cut-off control
20
3.9 k 1N4148 10 k 22 F 3.9 k BR1(1)
B1
FSW1
SC
75
75
22 H
MED723
VP = 8 V
220 F
beam current information
(1) Insert link BR1 if average beam current is not required.
Product specification
TDA4687
Fig.9 Test and application circuit.
Philips Semiconductors
Product specification
Video processor with automatic cut-off control
PACKAGE OUTLINE
handbook, plastic dual in-line package; 28 leads (600 mil) DIP28: full pagewidth
TDA4687
SOT117-1
seating plane
D
ME
A2
A
L
A1 c Z e b1 b 28 15 MH wM (e 1)
pin 1 index E
1
14
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 5.1 0.20 A1 min. 0.51 0.020 A2 max. 4.0 0.16 b 1.7 1.3 0.066 0.051 b1 0.53 0.38 0.020 0.014 c 0.32 0.23 0.013 0.009 D (1) 36.0 35.0 1.41 1.34 E (1) 14.1 13.7 0.56 0.54 e 2.54 0.10 e1 15.24 0.60 L 3.9 3.4 0.15 0.13 ME 15.80 15.24 0.62 0.60 MH 17.15 15.90 0.68 0.63 w 0.25 0.01 Z (1) max. 1.7 0.067
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT117-1 REFERENCES IEC 051G05 JEDEC MO-015AH EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-01-14
1997 Jun 23
21
Philips Semiconductors
Product specification
Video processor with automatic cut-off control
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Soldering by dipping or by wave The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TDA4687
with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Repairing soldered joints Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds.
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
1997 Jun 23
22
Philips Semiconductors
Product specification
Video processor with automatic cut-off control
NOTES
TDA4687
1997 Jun 23
23
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 689 211, Fax. +359 2 689 102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. +45 32 88 2636, Fax. +45 31 57 0044 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615800, Fax. +358 9 61580920 France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex, Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 23 53 60, Fax. +49 40 23 536 300 Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Tel. +30 1 4894 339/239, Fax. +30 1 4814 240 Hungary: see Austria India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd. Worli, MUMBAI 400 018, Tel. +91 22 4938 541, Fax. +91 22 4938 722 Indonesia: see Singapore Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Rua do Rocio 220, 5th floor, Suite 51, 04552-903 Sao Paulo, SAO PAULO - SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 829 1849 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 3 301 6312, Fax. +34 3 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 632 2000, Fax. +46 8 632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2686, Fax. +41 1 481 7730 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1997
Internet: http://www.semiconductors.philips.com
SCA54
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
547047/25/02/pp24
Date of release: 1997 Jun 23
Document order number:
9397 750 02023

▲Up To Search▲

Price & Availability of TDA4687

	To Download TDA4687 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .